1307 search results - page 231 / 262 » Low Power Hardware for a High Performance PDA |
158
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ISCA
2009
IEEE
16 years 25 days ago
2009
IEEE
The widespread use of multicore processors has dramatically increased the demands on high bandwidth and large capacity from memory systems. In a conventional DDR2/DDR3 DRAM memory...
178
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ICPP
2002
IEEE
15 years 11 months ago
2002
IEEE
A software cache implements instruction and data caching entirely in software. Dynamic binary rewriting offers a means to specialize the software cache miss checks at cache miss t...
153
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NSDI
2008
15 years 8 months ago
2008
This paper presents Swift, a packet filter for high performance packet capture on commercial off-the-shelf hardware. The key features of Swift include (1) extremely low filter upd...
215
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ECBS
1996
IEEE
15 years 10 months ago
1996
IEEE
In this paper, it is shown that, through the use of Model-Integrated Program Synthesis MIPS, parallel real-time implementations of image processing data ows can be synthesized fro...
203
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TVCG
2012
13 years 8 months ago
2012
—This paper presents a volumetric modeling framework to construct a novel spline scheme called restricted trivariate polycube splines (RTP-splines). The RTP-spline aims to genera...