1307 search results - page 221 / 262 » Low Power Hardware for a High Performance PDA |
198
click to vote
CF
2006
ACM
16 years 8 days ago
2006
ACM
Packet processing systems maintain high throughput despite relatively high memory latencies by exploiting the coarse-grained parallelism available between packets. In particular, ...
165
click to vote
FPL
2009
Springer
15 years 11 months ago
2009
Springer
In this paper we present a verification platform designed for HyperTransport 3.x (HT3) applications. HyperTransport 3.x is a very low latency and high bandwidth chip-tochip interc...
202
click to vote
ICSE
2007
IEEE-ACM
16 years 6 months ago
2007
IEEE-ACM
Abstract. Control systems for electrical microgrids rely ever more on heterogeneous off-the-shelf technology for hardware, software and networking among the intelligent electronic ...
177
click to vote
ARITH
2001
IEEE
15 years 10 months ago
2001
IEEE
The Instruction Set Architecture (ISA) of a programmable processor is the native languageof the machine. It defines the set of operations and resourcesthat are optimized for that ...
181
click to vote
FCCM
2005
IEEE
15 years 12 months ago
2005
IEEE
Increasing demands upon embedded systems for higher level services like networking, user interfaces and file system management, are driving growth in fully-featured operating syst...