1307 search results - page 175 / 262 » Low Power Hardware for a High Performance PDA |
169
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ISCA
2009
IEEE
16 years 1 months ago
2009
IEEE
Caching techniques have been an efficient mechanism for mitigating the effects of the processor-memory speed gap. Traditional multi-level SRAM-based cache hierarchies, especially...
172
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DATE
2009
IEEE
16 years 1 months ago
2009
IEEE
Abstract—Recent breakthroughs in circuit and process technology have enabled new usage models for non-volatile memory technologies such as Flash and phase change RAM (PCRAM) in t...
161
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DATE
2009
IEEE
16 years 1 months ago
2009
IEEE
Abstract—In this paper a programmable Forward Error Correction (FEC) IP for a DVB-S2 receiver is presented. It is composed of a Low-Density Parity Check (LDPC), a Bose-ChaudhuriH...
138
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MOBICOM
2006
ACM
16 years 10 days ago
2006
ACM
Significant progress has been made in terrestrial sensor networks to revolutionize sensing and data collection. To bring the concept of long-lived, dense sensor networks to the u...
148
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ASPDAC
2004
ACM
15 years 11 months ago
2004
ACM
— While essential for high-performance circuit design, the custom nature of datapath components confines their use in only a few microprocessor companies. The reusability of dat...