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VIIP
2001
15 years 7 months ago
Using Graphics Cards for Quantized FEM Computations
Graphics cards exercise increasingly more computing power and are highly optimized for high data transfer volumes. In contrast typical workstations perform badly when data exceeds...
Martin Rumpf, Robert Strzodka
DATE
2009
IEEE
138views Hardware» more  DATE 2009»
16 years 1 months ago
Hardware/software co-design architecture for thermal management of chip multiprocessors
—The sustained push for performance, transistor count, and instruction level parallelism has reached a point where chip level power density issues are at the forefront of design ...
Omer Khan, Sandip Kundu
ICCAD
2009
IEEE
136views Hardware» more  ICCAD 2009»
15 years 4 months ago
Multi-functional interconnect co-optimization for fast and reliable 3D stacked ICs
Heat removal and power delivery have become two major reliability concerns in 3D stacked IC technology. For thermal problem, two possible solutions exist: thermal-through-silicon-...
Young-Joon Lee, Rohan Goel, Sung Kyu Lim
CLUSTER
2006
IEEE
16 years 14 days ago
Cluster-based IP Router: Implementation and Evaluation
IP routers are now increasingly expected to do more than just traditional packet forwarding – they must be extensible as well as scalable. It is a challenge to design a router a...
Qinghua Ye, Mike H. MacGregor
ICCD
2005
IEEE
159views Hardware» more  ICCD 2005»
16 years 11 hour ago
Architectural-Level Fault Tolerant Computation in Nanoelectronic Processors
Nanoelectronic devices are expected to have extremely high and variable fault rates; thus future processor architectures based on these unreliable devices need to be built with fa...
Wenjing Rao, Alex Orailoglu, Ramesh Karri