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DSD
2008
IEEE
139views Hardware» more  DSD 2008»
15 years 8 months ago
Revisiting the Cache Effect on Multicore Multithreaded Network Processors
Caching mechanism has achieved great success in general purpose processor; however, its deployment in Network Processor (NP) raises questions over its effectiveness under the new ...
Zhen Liu, Jia Yu, Xiaojun Wang, Bin Liu, Laxmi N. ...
ICCAD
2001
IEEE
108views Hardware» more  ICCAD 2001»
16 years 3 months ago
Placement Driven Retiming with a Coupled Edge Timing Model
Retiming is a widely investigated technique for performance optimization. It performs powerful modifications on a circuit netlist. However, often it is not clear, whether the pred...
Ingmar Neumann, Wolfgang Kunz
MICRO
1997
IEEE
82views Hardware» more  MICRO 1997»
15 years 10 months ago
Procedure Based Program Compression
Cost and power consumption are two of the most important design factors for many embedded systems, particularly consumer devices. Products such as Personal Digital Assistants, pag...
Darko Kirovski, Johnson Kin, William H. Mangione-S...
EWSN
2009
Springer
16 years 7 months ago
A Better Choice for Sensor Sleeping
Sensor sleeping is a widely-used and cost-effective technique to save energy in wireless sensor networks. Protocols at different stack levels can, either individually or simultaneo...
Ou Yang, Wendi Rabiner Heinzelman
ISLPED
1995
ACM
70views Hardware» more  ISLPED 1995»
15 years 10 months ago
Transformation and synthesis of FSMs for low-power gated-clock implementation
We present a technique that automatically synthesizes nite state machines with gated clocks to reduce the power dissipation of the nal implementation. We describe a new transfor...
Luca Benini, Giovanni De Micheli