1307 search results - page 159 / 262 » Low Power Hardware for a High Performance PDA |
158
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DATE
2009
IEEE
16 years 1 months ago
2009
IEEE
Nowadays, in MPSoCs and NoCs, multicast protocol is significantly used for many parallel applications such as cache coherency in distributed shared-memory architectures, clock sync...
188
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DATE
2009
IEEE
16 years 1 months ago
2009
IEEE
Abstract— This paper presents a six-transistor (6T) singleended static random access memory (SE-SRAM) bitcell with an isolated read-port, suitable for low-Î and low-power embedd...
154
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ISCAS
2008
IEEE
16 years 25 days ago
2008
IEEE
— A fully differential translinear 3-phase sinusoidal oscillator architecture is presented. The architecture is meant for BiCMOS implementation and uses only NPN devices, typical...
186
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TWC
2008
15 years 6 months ago
2008
Abstract-- An information theoretic queueing model is proposed in a wireless multiple access communication setup. The proposed symmetric N user model captures physical layer parame...
163
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ISCAS
2006
IEEE
16 years 13 days ago
2006
IEEE
— We describe an analog VLSI circuit implementing spike-driven synaptic plasticity, embedded in a network of integrate-and-fire neurons. This biologically inspired synapse is hi...