1307 search results - page 145 / 262 » Low Power Hardware for a High Performance PDA |
154
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DATE
2000
IEEE
15 years 11 months ago
2000
IEEE
Very low bit error rate has become an important constraint in high performance communication systems that operate at very low signal to noise ratios: due to their impressive codin...
153
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ASPDAC
2008
ACM
15 years 8 months ago
2008
ACM
Abstract-- In this paper we present the first bus-aware microarchitectural floorplanning. Our goal is to study the impact of bus routability on other important floorplanning object...
176
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GLOBECOM
2007
IEEE
16 years 23 days ago
2007
IEEE
— Optimal pilot design and placement for channel estimation in Multiple-input Multiple-output (MIMO) Orthogonal Frequency-Division Multiplexing (OFDM) systems in the presence of ...
147
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ISCA
2008
IEEE
16 years 25 days ago
2008
IEEE
Multicore processors have emerged as a powerful platform on which to efficiently exploit thread-level parallelism (TLP). However, due to Amdahl’s Law, such designs will be incr...
158
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ISCA
2005
IEEE
16 years 1 days ago
2005
IEEE
Writing concurrent programs is difficult because of the complexity of ensuring proper synchronization. Conventional lock-based synchronization suffers from wellknown limitations, ...