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ISVLSI
2002
IEEE
89views VLSI» more  ISVLSI 2002»
15 years 11 months ago
Speedup of Self-Timed Digital Systems Using Early Completion
An Early Completion technique is developed to significantly increase the throughput of NULL Convention self-timed digital systems without impacting latency or compromising their s...
Scott C. Smith
VTS
2002
IEEE
109views Hardware» more  VTS 2002»
15 years 11 months ago
Controlling Peak Power During Scan Testing
This paper presents a procedure for modifying a given set of scan vectors so that the peak power during scan testing is kept below a specified limit without reducing fault coverag...
Ranganathan Sankaralingam, Nur A. Touba
SIGMOD
2010
ACM
174views Database» more  SIGMOD 2010»
15 years 11 months ago
Sampling dirty data for matching attributes
We investigate the problem of creating and analyzing samples of relational databases to find relationships between string-valued attributes. Our focus is on identifying attribute...
Henning Köhler, Xiaofang Zhou, Shazia Wasim S...
ISLPED
2009
ACM
108views Hardware» more  ISLPED 2009»
15 years 10 months ago
Technology flavor selection and adaptive techniques for timing-constrained 45nm subthreshold circuits
We investigate techniques to design 45nm minimum-energy subthreshold CMOS circuits under timing constraints, considering the practical case of an 8-bit multiplier. We first show ...
David Bol, Denis Flandre, Jean-Didier Legat
PLDI
2009
ACM
15 years 10 months ago
Progress guarantee for parallel programs via bounded lock-freedom
Parallel platforms are becoming ubiquitous with modern computing systems. Many parallel applications attempt to avoid locks in order to achieve high responsiveness, aid scalabilit...
Erez Petrank, Madanlal Musuvathi, Bjarne Steensgaa...