This paper presents the hardware architecture of DynaCORE, a dynamically reconfigurable system-on-chip for network applications. DynaCORE is an application specific coprocessor ...
Roman Koch, Thilo Pionteck, Carsten Albrecht, Erik...
— Quadrature Σ∆ ADCs require a feedback path for both the I and the Q part of the complex feedback signal. If two separated multibit feedback DACs are used, mismatch among the...
Stijn Reekmans, Jeroen De Maeyer, Pieter Rombouts,...
We introduce the logical story behind file input in ACL2 and discuss the types of theorems that can be proven about filereading operations. We develop a low level library for re...
Biologists studying the evolutionary relationships between organisms use software packages to solve the computational problems they encounter. Several of these problems involve th...
Clos networks are an important class of switching networks due to their modular structure and much lower cost compared with crossbars. For routing I/O permutations of Clos network...