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ICCD
2006
IEEE
115views Hardware» more  ICCD 2006»
16 years 3 months ago
Microarchitecture and Performance Analysis of Godson-2 SMT Processor
—This paper introduces the microarchitecture and logical implementation of SMT (Simultaneous Multithreading) improvement of Godson-2 processor which is a 64-bit, four-issue, out-...
Zusong Li, Xianchao Xu, Weiwu Hu, Zhimin Tang
ICCD
2004
IEEE
87views Hardware» more  ICCD 2004»
16 years 3 months ago
Fetch Halting on Critical Load Misses
As the performance gap between processors and memory systems increases, the CPU spends more time stalled waiting for data from main memory. Critical long latency instructions, suc...
Nikil Mehta, Brian Singer, R. Iris Bahar, Michael ...
ICCAD
2008
IEEE
140views Hardware» more  ICCAD 2008»
16 years 3 months ago
To SAT or not to SAT: Ashenhurst decomposition in a large scale
Functional decomposition is a fundamental operation in logic synthesis. Prior BDD-based approaches to functional decomposition suffer from the memory explosion problem and do not...
Hsuan-Po Lin, Jie-Hong Roland Jiang, Ruei-Rung Lee
ICCAD
2006
IEEE
169views Hardware» more  ICCAD 2006»
16 years 3 months ago
Microarchitecture parameter selection to optimize system performance under process variation
Abstract— Design variability due to within-die and die-todie process variations has the potential to significantly reduce the maximum operating frequency and the effective yield...
Xiaoyao Liang, David Brooks
TIME
2009
IEEE
16 years 28 days ago
Model Checking CTL is Almost Always Inherently Sequential
The model checking problem for CTL is known to be P-complete (Clarke, Emerson, and Sistla (1986), see Schnoebelen (2002)). We consider fragments of CTL obtained by restricting the...
Olaf Beyersdorff, Arne Meier, Michael Thomas, Heri...