2858 search results - page 424 / 572 » Logics with Aggregate Operators |
163
click to vote
FPL
2009
Springer
15 years 11 months ago
2009
Springer
Clock gating is a power reduction technique that has been used successfully in the custom ASIC domain. Clock and logic signal power are saved by temporarily disabling the clock si...
125
click to vote
CONTEXT
2001
Springer
15 years 11 months ago
2001
Springer
Abstract. In this paper we propose to re-read the past work on formalizing context as the search for a logic of the relationships between partial, approximate, and perspectival the...
182
click to vote
ICLP
2001
Springer
15 years 10 months ago
2001
Springer
We usually use natural language vocabulary for sort names in order-sorted logics, and some sort names may contradict other sort names in the sort-hierarchy. These implicit negation...
180
click to vote
HASE
1999
IEEE
15 years 10 months ago
1999
IEEE
Statechart Diagrams provide a graphical notation for describing dynamic aspects of system behaviour within the Unified Modeling Language (UML). In this paper we present a branchin...
173
click to vote
ICCAD
1999
IEEE
15 years 10 months ago
1999
IEEE
This paper describes a method of synthesis of asynchronous circuits with relative timing. Asynchronous communication between gates and modules typically utilizes handshakes to ens...