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CAV
1998
Springer
175views Hardware» more  CAV 1998»
15 years 10 months ago
An ACL2 Proof of Write Invalidate Cache Coherence
As a pedagogical exercise in ACL2, we formalize and prove the correctness of a write invalidate cache scheme. In our formalization, an arbitrary number of processors, each with its...
J. Strother Moore
RSCTC
2000
Springer
197views Fuzzy Logic» more  RSCTC 2000»
15 years 10 months ago
Rough Set Approach to CBR
We discuss how Case Based Reasoning (CBR) (see e.g. [1], [4]) philosophy of adaptation of some known situations to new similar ones can be realized in rough set framework [5] for c...
Jan Wierzbicki
TCS
2008
15 years 6 months ago
A typed lambda calculus with intersection types
Intersection types are well-known to type theorists mainly for two reasons. Firstly, they type all and only the strongly normalizable lambda terms. Secondly, the intersection type...
Viviana Bono, Betti Venneri, Lorenzo Bettini
ICDE
2004
IEEE
124views Database» more  ICDE 2004»
16 years 7 months ago
Authenticating Query Results in Edge Computing
Edge computing pushes application logic and the underlying data to the edge of the network, with the aim of improving availability and scalability. As the edge servers are not nec...
HweeHwa Pang, Kian-Lee Tan
DAC
2002
ACM
16 years 7 months ago
IP delivery for FPGAs using Applets and JHDL
This paper introduces an FPGA IP evaluation and delivery system that operates within Java applets. The use of such applets allows designers to create, evaluate, test, and obtain F...
Michael J. Wirthlin, Brian McMurtrey