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ICCAD
2004
IEEE
121views Hardware» more  ICCAD 2004»
16 years 3 months ago
Factoring and eliminating common subexpressions in polynomial expressions
Polynomial expressions are used to compute a wide variety of mathematical functions commonly found in signal processing and graphics applications, which provide good opportunities...
Anup Hosangadi, Farzan Fallah, Ryan Kastner
DATE
2009
IEEE
116views Hardware» more  DATE 2009»
16 years 1 months ago
A high-level debug environment for communication-centric debug
—A large part of a modern SOC’s debug complexity resides in the interaction between the main system components. ion-level debug moves the abstraction level of the debug process...
Kees Goossens, Bart Vermeulen, Ashkan Beyranvand N...
PPDP
2009
Springer
16 years 1 months ago
A declarative encoding of telecommunications feature subscription in SAT
This paper describes the encoding of a telecommunications feature subscription configuration problem to propositional logic and its solution using a state-of-the-art Boolean sati...
Michael Codish, Samir Genaim, Peter J. Stuckey
ISVLSI
2008
IEEE
136views VLSI» more  ISVLSI 2008»
16 years 1 months ago
CMOS Control Enabled Single-Type FET NASIC
A new hybrid CMOS-nanoscale circuit style has been developed that uses only one type of Field Effect Transistor (FET) in the logic portions of a design. This is enabled by CMOS pro...
Pritish Narayanan, Michael Leuchtenburg, Teng Wang...
DSD
2007
IEEE
83views Hardware» more  DSD 2007»
16 years 28 days ago
Hierarchical Identification of Untestable Faults in Sequential Circuits
Similar to sequential test pattern generation, the problem of identifying untestable faults in sequential circuits remains unsolved. Most of the previous works in untestability id...
Jaan Raik, Raimund Ubar, Anna Krivenko, Margus Kru...