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VLDB
1997
ACM
126views Database» more  VLDB 1997»
15 years 10 months ago
Dynamic Memory Adjustment for External Mergesort
Sorting is a memory intensive operation whose performance is greatly affected by the amount of memory available as work space. When the input size is unknown or available memory s...
Weiye Zhang, Per-Åke Larson
ATMOS
2008
101views Optimization» more  ATMOS 2008»
15 years 8 months ago
Robust Line Planning under Unknown Incentives and Elasticity of Frequencies
The problem of robust line planning requests for a set of origin-destination paths (lines) along with their traffic rates (frequencies) in an underlying railway network infrastruct...
Spyros C. Kontogiannis, Christos D. Zaroliagis
EH
1999
IEEE
161views Hardware» more  EH 1999»
15 years 11 months ago
Reconfigurable FPGA's in the 1-20 GHz Band with HBT BiCMOS
-- This paper describes the operation of a field programmable gate array (FPGA), the basics of current mode logic, and examines the idea of creating a SiGe heterojunction bipolar (...
John F. McDonald, Bryan S. Goda
SIGSOFT
2007
ACM
16 years 7 months ago
The symmetry of the past and of the future: bi-infinite time in the verification of temporal properties
Model checking techniques have traditionally dealt with temporal logic languages and automata interpreted over -words, i.e., infinite in the future but finite in the past. However...
Matteo Pradella, Angelo Morzenti, Pierluigi San Pi...
LPNMR
1997
Springer
15 years 10 months ago
Power Defaults
This paper introduces power default reasoning (PDR), a framework for nonmonotonic reasoning based on the domain-theoretic idea of modeling default rules with partial-information i...
Guo-Qiang Zhang, William C. Rounds