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FMCO
2007
Springer
118views Formal Methods» more  FMCO 2007»
16 years 21 days ago
Coordination: Reo, Nets, and Logic
This article considers the coordination language Reo, a Petri net variant called zero-safe nets, and intuitionistic temporal linear logic (ITLL). The first part examines the seman...
Dave Clarke
FPGA
2001
ACM
145views FPGA» more  FPGA 2001»
15 years 11 months ago
Simultaneous logic decomposition with technology mapping in FPGA designs
Conventional technology mapping algorithms for SRAM-based Field Programmable Gate Arrays (FPGAs) are normally carried out on a fixed logic decomposition of a circuit. The impact o...
Gang Chen, Jason Cong
FORMATS
2006
Springer
15 years 10 months ago
Integrating Discrete- and Continuous-Time Metric Temporal Logics Through Sampling
Abstract. Real-time systems usually encompass parts that are best described by a continuous-time model, such as physical processes under control, together with other components tha...
Carlo A. Furia, Matteo Rossi
ATS
2005
IEEE
164views Hardware» more  ATS 2005»
15 years 8 months ago
A Family of Logical Fault Models for Reversible Circuits
Reversibility is of interest in achieving extremely low power dissipation; it is also an inherent design requirement of quantum computation. Logical fault models for conventional ...
Ilia Polian, Thomas Fiehn, Bernd Becker, John P. H...
EUSFLAT
2003
143views Fuzzy Logic» more  EUSFLAT 2003»
15 years 8 months ago
Prediction of surface roughness in ultraprecision turning using fuzzy logic
Ultraprecision turning is a manufacturing process used to generate a high surface roughness in precision components, and its input-output relationships are highly nonlinear. Surfa...
Arup Kumar Nandi