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ISCA
2012
IEEE
279views Hardware» more  ISCA 2012»
13 years 9 months ago
Staged memory scheduling: Achieving high performance and scalability in heterogeneous systems
When multiple processor (CPU) cores and a GPU integrated together on the same chip share the off-chip main memory, requests from the GPU can heavily interfere with requests from t...
Rachata Ausavarungnirun, Kevin Kai-Wei Chang, Lava...

Publication
304views
17 years 5 months ago
A Binary Feedback Scheme for Congestion Avoidance in Computer Networks with Connectionless Network Layer
We propose a scheme for congestion avoidance in networks using a connectionless protocol at the network layer. The scheme uses a minimal amount of feedback from the network to the ...
K. Ramakrishnan and R. Jain
149
Voted
ICCV
2003
IEEE
16 years 8 months ago
Dense Matching of Multiple Wide-baseline Views
This paper describes a PDE-based method for dense depth extraction from multiple wide-baseline images. Emphasis lies on the usage of only a small amount of images. The integration...
Christoph Strecha, Tinne Tuytelaars, Luc J. Van Go...
DAC
2001
ACM
16 years 7 months ago
Re-Configurable Computing in Wireless
Wireless communications requires a new approach to implement the algorithms for new standards. The computational demands of these standards are outstripping the ability of traditi...
Bill Salefski, Levent Caglar
WWW
2005
ACM
16 years 7 months ago
Data versioning techniques for internet transaction management
An Internet transaction is a transaction that involves communication over the Internet using standard Internet protocols such as HTTPS. Such transactions are widely used in Intern...
Ramkrishna Chatterjee, Gopalan Arun