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ATS
2003
IEEE
110views Hardware» more  ATS 2003»
15 years 11 months ago
Chip-Level Diagnostic Strategy for Full-Scan Designs with Multiple Faults
Fault diagnosis of full-scan designs has been progressed significantly. However, most existing techniques are aimed at a logic block with a single fault. Strategies on top of thes...
Yu-Chiun Lin, Shi-Yu Huang
ASYNC
1999
IEEE
110views Hardware» more  ASYNC 1999»
15 years 10 months ago
Verification of Delayed-Reset Domino Circuits Using ATACS
This paper discusses the application of the timing analysis tool ATACS to the high performance, self-resetting and delayed-reset domino circuits being designed at IBM's Austi...
Wendy Belluomini, Chris J. Myers, H. Peter Hofstee
SSDBM
1999
IEEE
135views Database» more  SSDBM 1999»
15 years 10 months ago
Query Processing in the TAMBIS Bioinformatics Source Integration System
Conducting bioinformatic analyses involves biologists in expressing requests over a range of highly heterogeneous information sources and software tools. Such activities are labor...
Norman W. Paton, Robert Stevens, Patricia G. Baker...
HT
1998
ACM
15 years 10 months ago
Inferring Web Communities from Link Topology
The World Wide Web grows through a decentralized, almost anarchic process, and this has resulted in a large hyperlinked corpus without the kind of logical organization that can be...
David Gibson, Jon M. Kleinberg, Prabhakar Raghavan
CONCUR
1997
Springer
15 years 10 months ago
Reachability Analysis of Pushdown Automata: Application to Model-Checking
We apply the symbolic analysis principle to pushdown systems. We represent (possibly in nite) sets of con gurations of such systems by means of nite-state automata. In order to re...
Ahmed Bouajjani, Javier Esparza, Oded Maler