Ordinary logical implication is not enough for answering queries in a logic database, since especially negative information is only implicitly represented in the database state. M...
The performance benefits of a monolithically stacked 3DFPGA, whereby the programming overhead of an FPGA is stacked on top of a standard CMOS layer containing the logic blocks and...
Mingjie Lin, Abbas El Gamal, Yi-Chang Lu, Simon Wo...
The Temporal Rover is a specification based verification tool for applications written in C, C++, Java, Verilog and VHDL. The tool combines formal specification, using Linear-Time ...
In this paper we propose a version of default logic with the following two properties: (1) defaults with mutually inconsistent justications are never used together in constructing ...
The importance of the efforts towards integrating the symbolic and connectionist paradigms of artificial intelligence has been widely recognised. Integration may lead to more e...