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LICS
2006
IEEE
16 years 23 days ago
Temporal Logics and Model Checking for Fairly Correct Systems
We motivate and study a generic relaxation of correctness of reactive and concurrent systems with respect to a temporal specification. We define a system to be fairly correct if...
Daniele Varacca, Hagen Völzer
FORMATS
2005
Springer
16 years 9 days ago
Real Time Temporal Logic: Past, Present, Future
This paper attempts to improve our understanding of timed languages and their relation to timed automata. We start by giving a constructive proof of the folk theorem stating that t...
Oded Maler, Dejan Nickovic, Amir Pnueli
KR
2004
Springer
16 years 4 days ago
Condensed Representations for Inductive Logic Programming
When mining frequent Datalog queries, many queries will be equivalent in the light of an implicit or explicit background knowledge. To alleviate the problem, we introduce various t...
Luc De Raedt, Jan Ramon
LPNMR
2004
Springer
16 years 4 days ago
Planning with Preferences Using Logic Programming
Abstract. We present a declarative language, PP, for the specification of preferences between possible solutions (or trajectories) of a planning problem. This novel language allow...
Tran Cao Son, Enrico Pontelli
146
Voted
ICES
2003
Springer
86views Hardware» more  ICES 2003»
15 years 12 months ago
A Note on Designing Logical Circuits Using SAT
Abstract. We present a systematic procedure for the synthesis and minimisation of digital circuits using propositional satisfiability. We encode the truth table into a canonical s...
Giovani Gomez Estrada