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ISCA
2012
IEEE
279views Hardware» more  ISCA 2012»
13 years 9 months ago
Staged memory scheduling: Achieving high performance and scalability in heterogeneous systems
When multiple processor (CPU) cores and a GPU integrated together on the same chip share the off-chip main memory, requests from the GPU can heavily interfere with requests from t...
Rachata Ausavarungnirun, Kevin Kai-Wei Chang, Lava...
ISCA
2012
IEEE
320views Hardware» more  ISCA 2012»
13 years 9 months ago
Viper: Virtual pipelines for enhanced reliability
The reliability of future processors is threatened by decreasing transistor robustness. Current architectures focus on delivering high performance at low cost; lifetime device rel...
Andrea Pellegrini, Joseph L. Greathouse, Valeria B...
VLDB
2007
ACM
225views Database» more  VLDB 2007»
16 years 7 months ago
An Approach to Optimize Data Processing in Business Processes
In order to optimize their revenues and profits, an increasing number of businesses organize their business activities in terms of business processes. Typically, they automate imp...
Marko Vrhovnik, Holger Schwarz, Oliver Suhre, Bern...
SAC
2010
ACM
16 years 1 months ago
Analysis of collision probability in unsaturated situation
A large number of the MAC protocols proposed for establishing wireless sensor networks are based on the 802.11 standard. The trade-off in these protocols is the control packet ov...
Qian Dong, Waltenegus Dargie
DSN
2009
IEEE
16 years 1 months ago
Intrusion-tolerant self-healing devices for critical infrastructure protection
Critical infrastructures like the power grid are essentially physical processes controlled by electronic devices. In the last decades, these electronic devices started to be contr...
Paulo Sousa, Alysson Neves Bessani, Wagner Saback ...