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DATE
2006
IEEE
124views Hardware» more  DATE 2006»
16 years 14 days ago
Timing-driven cell layout de-compaction for yield optimization by critical area minimization
This paper proposes a yield optimization method for standard-cells under timing constraints. Yield-aware logic synthesis and physical optimization require yield-enhanced standard ...
Tetsuya Iizuka, Makoto Ikeda, Kunihiro Asada
IEEEARES
2006
IEEE
16 years 13 days ago
Sandboxing in myKlaim
The µKlaim calculus is a process algebra designed to study the programming of distributed systems consisting of a number of locations each having their own tuple space and collec...
René Rydhof Hansen, Christian W. Probst, Fl...
IEEEPACT
2006
IEEE
16 years 13 days ago
Adaptive reorder buffers for SMT processors
In SMT processors, the complex interplay between private and shared datapath resources needs to be considered in order to realize the full performance potential. In this paper, we...
Joseph J. Sharkey, Deniz Balkan, Dmitry Ponomarev
MICRO
2006
IEEE
162views Hardware» more  MICRO 2006»
16 years 12 days ago
Adaptive Caches: Effective Shaping of Cache Behavior to Workloads
We present and evaluate the idea of adaptive processor cache management. Specifically, we describe a novel and general scheme by which we can combine any two cache management alg...
Ranjith Subramanian, Yannis Smaragdakis, Gabriel H...
ACL2
2006
ACM
16 years 11 days ago
Reasoning about ACL2 file input
We introduce the logical story behind file input in ACL2 and discuss the types of theorems that can be proven about filereading operations. We develop a low level library for re...
Jared Davis