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» Logic, Graphs, and Algorithms
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135
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ICCAD
1996
IEEE
119views Hardware» more  ICCAD 1996»
15 years 11 months ago
An algorithm for synthesis of system-level interface circuits
We describe an algorithm for the synthesis and optimization of interface circuits for embedded system components such as microprocessors, memory ASIC, and network subsystems with ...
Ki-Seok Chung, Rajesh K. Gupta, C. L. Liu
159
Voted
JMLR
2010
111views more  JMLR 2010»
15 years 1 months ago
An EM Algorithm on BDDs with Order Encoding for Logic-based Probabilistic Models
Logic-based probabilistic models (LBPMs) enable us to handle problems with uncertainty succinctly thanks to the expressive power of logic. However, most of LBPMs have restrictions...
Masakazu Ishihata, Yoshitaka Kameya, Taisuke Sato,...
AMAI
2006
Springer
15 years 6 months ago
Tableau-based automata construction for dynamic linear time temporal logic*
We present a tableau-based algorithm for obtaining a B
Laura Giordano, Alberto Martelli
ICS
2010
Tsinghua U.
16 years 4 months ago
Local Algorithms for Finding Interesting Individuals in Large Networks
: We initiate the study of local, sublinear time algorithms for finding vertices with extreme topological properties -- such as high degree or clustering coefficient -- in large so...
Mickey Brautbar, Michael Kearns
WALCOM
2010
IEEE
255views Algorithms» more  WALCOM 2010»
16 years 1 months ago
A Global k-Level Crossing Reduction Algorithm
Abstract. Directed graphs are commonly drawn by the Sugiyama algorithm, where crossing reduction is a crucial phase. It is done by repeated one-sided 2-level crossing minimizations...
Christian Bachmaier, Franz-Josef Brandenburg, Wolf...