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DATE
2004
IEEE
114views Hardware» more  DATE 2004»
15 years 10 months ago
Power Aware Variable Partitioning and Instruction Scheduling for Multiple Memory Banks
Many high-end DSP processors employ both multiple memory banks and heterogeneous register files to improve performance and power consumption. The complexity of such architectures ...
Zhong Wang, Xiaobo Sharon Hu
FDL
2004
IEEE
15 years 10 months ago
On Actors and Objects - OOP in System Level Design
The steadily increasing complexity of embedded systems requires comprehensive methodoloat support the design process from the highest possible abstraction level. In most of the cu...
Joachim K. Anlauf, Philipp A. Hartmann
DGCI
2006
Springer
15 years 10 months ago
Topological and Geometrical Reconstruction of Complex Objects on Irregular Isothetic Grids
In this paper, we address the problem of vectorization of binary images on irregular isothetic grids. The representation of graphical elements by lines is common in document analys...
Antoine Vacavant, David Coeurjolly, Laure Tougne
ERSHOV
2006
Springer
15 years 10 months ago
A Versioning and Evolution Framework for RDF Knowledge Bases
We present an approach to support the evolution of online, distributed, reusable, and extendable ontologies based on the RDF data model. The approach works on the basis of atomic c...
Sören Auer, Heinrich Herre
ASPDAC
2001
ACM
137views Hardware» more  ASPDAC 2001»
15 years 10 months ago
Optimized address assignment for DSPs with SIMD memory accesses
This paper deals with address assignment in code generation for digital signal processors (DSPs) with SIMD (single instruction multiple data) memory accesses. In these processors ...
Markus Lorenz, David Koffmann, Steven Bashford, Ra...
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