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VTS
2005
IEEE
89views Hardware» more  VTS 2005»
15 years 12 months ago
Synthesis of Low Power CED Circuits Based on Parity Codes
An automated design procedure is described for synthesizing circuits with low power concurrent error detection. It is based on pre-synthesis selection of a parity-check code follo...
Shalini Ghosh, Sugato Basu, Nur A. Touba
LPNMR
2005
Springer
15 years 11 months ago
An ID-Logic Formalization of the Composition of Autonomous Databases
We introduce a declarative approach for a coherent composition of autonomous databases. For this we use ID-logic, a formalism that extends classical logic with inductive definitio...
Bert Van Nuffelen, Ofer Arieli, Alvaro Corté...
PVM
2004
Springer
15 years 11 months ago
Numerical Simulations on PC Graphics Hardware
On recent PC graphics cards, fully programmable parallel geometry and pixel units are available providing powerful instruction sets to perform arithmetic and logical operations. In...
Jens Krüger, Thomas Schiwietz, Peter Kipfer, ...
CONTEXT
2003
Springer
15 years 11 months ago
A SAT-Based Algorithm for Context Matching
The development of more and more complex distributed applications over large networks of computers has raised the problem of semantic interoperability across applications based on ...
Paolo Bouquet, Bernardo Magnini, Luciano Serafini,...
WISE
2000
Springer
15 years 10 months ago
Multicache-Based Content Management for Web Caching
Large scale web caches are in fact localized sources of web contents. Besides replacement policies, which decide the contents of a cache, the management of such contents is an iss...
Kai Cheng, Yahiko Kambayashi