Sciweavers

1825 search results - page 355 / 365
» Local Dimensionality Reduction
Sort
View
LCTRTS
2009
Springer
16 years 19 days ago
A compiler optimization to reduce soft errors in register files
Register file (RF) is extremely vulnerable to soft errors, and traditional redundancy based schemes to protect the RF are prohibitive not only because RF is often in the timing c...
Jongeun Lee, Aviral Shrivastava
NOCS
2009
IEEE
16 years 17 days ago
A GALS many-core heterogeneous DSP platform with source-synchronous on-chip interconnection network
This paper presents a many-core heterogeneous computational platform that employs a GALS compatible circuit-switched on-chip network. The platform targets streaming DSP and embedd...
Anh T. Tran, Dean Truong, Bevan M. Baas
HASKELL
2009
ACM
16 years 11 days ago
A compositional theory for STM Haskell
We address the problem of reasoning about Haskell programs that use Software Transactional Memory (STM). As a motivating example, we consider Haskell code for a concurrent non-det...
Johannes Borgström, Karthikeyan Bhargavan, An...
APSCC
2008
IEEE
16 years 10 days ago
Hop-by-Hop TCP over MANET
In a MANET environment, communication links are unstable due to various reasons. Error rate is higher and bandwidth is smaller than fixed networks. Running conventional TCP protoco...
Yao-Nan Lien, Yi-Fan Yu
HOTI
2008
IEEE
16 years 9 days ago
Network Processing on an SPE Core in Cell Broadband Engine
Cell Broadband EngineTM is a multi-core system on a chip and is composed of a general-purpose Power Processing Element (PPE) and eight Synergistic Processing Elements (SPEs). Its ...
Yuji Kawamura, Takeshi Yamazaki, Hiroshi Kyusojin,...