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» Load-Reuse Analysis: Design and Evaluation
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TPDS
2002
198views more  TPDS 2002»
15 years 6 months ago
Orthogonal Striping and Mirroring in Distributed RAID for I/O-Centric Cluster Computing
This paper presents a new distributed disk-array architecture for achieving high I/O performance in scalable cluster computing. In a serverless cluster of computers, all distribute...
Kai Hwang, Hai Jin, Roy S. C. Ho
CSCW
2011
ACM
15 years 1 months ago
Supporting air traffic control collaboration with a TableTop system
Collaboration is key to safety and efficiency in Air Traffic Control. Legacy paper-based systems enable seamless and non-verbal collaboration, but trends in new software and hardw...
Stéphane Conversy, Hélène Gas...
ECSA
2011
Springer
14 years 6 months ago
Delta-oriented architectural variability using MontiCore
Modeling of software architectures is a fundamental part of software development processes. Reuse of software components and early analysis of software topologies allow the reduct...
Arne Haber, Thomas Kutz, Holger Rendel, Bernhard R...
VEE
2012
ACM
187views Virtualization» more  VEE 2012»
14 years 1 months ago
DDGacc: boosting dynamic DDG-based binary optimizations through specialized hardware support
Dynamic Binary Translators (DBT) and Dynamic Binary Optimization (DBO) by software are used widely for several reasons including performance, design simplification and virtualiza...
Demos Pavlou, Enric Gibert, Fernando Latorre, Anto...
DATE
2009
IEEE
119views Hardware» more  DATE 2009»
16 years 1 months ago
On-chip communication architecture exploration for processor-pool-based MPSoC
— MPSoC is evolving towards processor-pool (PP)-based architectures, which employ hierarchical on-chip network for inter- and intra-PP communication. Since the design space of PP...
Young-Pyo Joo, Sungchan Kim, Soonhoi Ha