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ISCA
2007
IEEE
111views Hardware» more  ISCA 2007»
16 years 9 days ago
Express virtual channels: towards the ideal interconnection fabric
Due to wire delay scalability and bandwidth limitations inherent in shared buses and dedicated links, packet-switched on-chip interconnection networks are fast emerging as the per...
Amit Kumar 0002, Li-Shiuan Peh, Partha Kundu, Nira...
IPSN
2007
Springer
16 years 4 days ago
Robust message-passing for statistical inference in sensor networks
Large-scale sensor network applications require in-network processing and data fusion to compute statistically relevant summaries of the sensed measurements. This paper studies di...
Jeremy Schiff, Dominic Antonelli, Alexandros G. Di...
CF
2006
ACM
15 years 12 months ago
Exploiting locality to ameliorate packet queue contention and serialization
Packet processing systems maintain high throughput despite relatively high memory latencies by exploiting the coarse-grained parallelism available between packets. In particular, ...
Sailesh Kumar, John Maschmeyer, Patrick Crowley
CODES
2005
IEEE
15 years 11 months ago
Enhancing security through hardware-assisted run-time validation of program data properties
The growing number of information security breaches in electronic and computing systems calls for new design paradigms that consider security as a primary design objective. This i...
Divya Arora, Anand Raghunathan, Srivaths Ravi, Nir...
CSB
2005
IEEE
189views Bioinformatics» more  CSB 2005»
15 years 11 months ago
Learning Yeast Gene Functions from Heterogeneous Sources of Data Using Hybrid Weighted Bayesian Networks
We developed a machine learning system for determining gene functions from heterogeneous sources of data sets using a Weighted Naive Bayesian Network (WNB). The knowledge of gene ...
Xutao Deng, Huimin Geng, Hesham H. Ali