11066 search results - page 1783 / 2214 » Linearity in Process Languages |
134
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FDL
2003
IEEE
16 years 3 days ago
2003
IEEE
With System on Chip low power constraints becoming increasingly important, emphasis is moving to architectural level, optimum memory organisation and system run time management. T...
164
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FDL
2003
IEEE
16 years 3 days ago
2003
IEEE
This contribution proposes a synchronization technique for solvers able to handle analogue extensions to SystemC, for modelling of general, mixed-mode systems with digital and non...
170
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FDL
2003
IEEE
16 years 3 days ago
2003
IEEE
Assuring correctness of digital designs is one of the major tasks in the system design flow. Formal methods have been proposed to accompany commonly used simulation approaches. I...
211
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FDL
2003
IEEE
16 years 3 days ago
2003
IEEE
Reconfigurable Systolic Arrays are a generalization of Systolic Arrays where node operations and interconnections can be redefined even at run time. This flexibility increases the...
164
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HICSS
2003
IEEE
16 years 3 days ago
2003
IEEE
The objective of this paper is to provide a unified, theoretically grounded framework for trust in electronic environments. An overview of the research on trust is presented, exam...