Sciweavers

3044 search results - page 383 / 609
» Linear logical approximations
Sort
View
DATE
2000
IEEE
140views Hardware» more  DATE 2000»
15 years 11 months ago
Parallel and Distributed VHDL Simulation
This paper presents a methodology for parallel and distributed simulation of VHDL using the PDES (parallel discrete-event simulation) paradigm. To achieve better features and perf...
Dragos Lungeanu, C.-J. Richard Shi
ARTS
1999
Springer
15 years 11 months ago
ProbVerus: Probabilistic Symbolic Model Checking
Model checking can tell us whether a system is correct; probabilistic model checking can also tell us whether a system is timely and reliable. Moreover, probabilistic model checkin...
Vicky Hartonas-Garmhausen, Sérgio Vale Agui...
JELIA
1994
Springer
15 years 10 months ago
Temporal Theories of Reasoning
: In this paper we describe a general way of formalizing reasoning behaviour. Such a behaviour may be described by all the patterns which are valid for the behaviour. A pattern can...
Joeri Engelfriet, Jan Treur
CAV
2010
Springer
172views Hardware» more  CAV 2010»
15 years 10 months ago
Symbolic Bounded Synthesis
Abstract. Synthesis of finite state systems from full linear time temporal logic (LTL) specifications is gaining more and more attention as several recent achievements have signi...
Rüdiger Ehlers
ATVA
2006
Springer
114views Hardware» more  ATVA 2006»
15 years 10 months ago
Selective Approaches for Solving Weak Games
Abstract. Model-checking alternating-time properties has recently attracted much interest in the verification of distributed protocols. While checking the validity of a specificati...
Malte Helmert, Robert Mattmüller, Sven Schewe