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VLSID
2005
IEEE
89views VLSI» more  VLSID 2005»
16 years 7 months ago
Power Optimization in Current Mode Circuits
We propose a method to minimize power dissipation in current-mode CMOS analog and multiple-valued logic (MVL) circuits employing a stack of current comparators. First, we present ...
M. S. Bhat, H. S. Jamadagni
WILF
2009
Springer
150views Fuzzy Logic» more  WILF 2009»
16 years 1 months ago
General Fuzzy Answer Set Programs
A number of generalizations of answer set programming have been proposed in the literature to deal with vagueness, uncertainty, and partial rule satisfaction. We introduce a unifyi...
Jeroen Janssen, Steven Schockaert, Dirk Vermeir, M...
ICTAI
2008
IEEE
16 years 1 months ago
On Approaches to Explaining Infeasibility of Sets of Boolean Clauses
These last years, the issue of locating and explaining contradictions inside sets of propositional clauses has received a renewed attention due to the emergence of very efficient...
Éric Grégoire, Bertrand Mazure, C&ea...
ISCAS
2008
IEEE
120views Hardware» more  ISCAS 2008»
16 years 1 months ago
Improving the power-delay product in SCL circuits using source follower output stage
— This article explores the effect of using source follower buffers (SFB) at the output of source coupled logic (SCL) circuits. This technique can help to improve the power-delay...
Armin Tajalli, Frank K. Gürkaynak, Yusuf Lebl...
AHS
2007
IEEE
231views Hardware» more  AHS 2007»
16 years 28 days ago
Debug Support for Hybrid SoCs
System-on-Chip devices containing both conventional and reconfigurable circuits are increasing in popularity. However the on-chip debug support infrastructure required to aid syst...
Andrew B. T. Hopkins, Klaus D. McDonald-Maier