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FPL
2009
Springer
161views Hardware» more  FPL 2009»
15 years 11 months ago
A multi-FPGA architecture for stochastic Restricted Boltzmann Machines
Although there are many neural network FPGA architectures, there is no framework for designing large, high-performance neural networks suitable for the real world. In this paper, ...
Daniel L. Ly, Paul Chow
SPAA
2010
ACM
15 years 11 months ago
Brief announcement: serial-parallel reciprocity in dynamic multithreaded languages
In dynamically multithreaded platforms that employ work stealing, there appears to be a fundamental tradeoff between providing provably good time and space bounds and supporting S...
Kunal Agrawal, I.-Ting Angelina Lee, Jim Sukha
RTSS
1999
IEEE
15 years 11 months ago
Optimal Reward-Based Scheduling of Periodic Real-Time Tasks
Reward-based scheduling refers to the problem in which there is a reward associated with the execution of a task. In our framework, each real-time task comprises a mandatory and a...
Hakan Aydin, Rami G. Melhem, Daniel Mossé, ...
GECCO
2007
Springer
181views Optimization» more  GECCO 2007»
15 years 10 months ago
Learning recursive programs with cooperative coevolution of genetic code mapping and genotype
The Probabilistic Adaptive Mapping Developmental Genetic Programming (PAM DGP) algorithm that cooperatively coevolves a population of adaptive mappings and associated genotypes is...
Garnett Carl Wilson, Malcolm I. Heywood
ITC
2000
IEEE
84views Hardware» more  ITC 2000»
15 years 10 months ago
Non-intrusive BIST for systems-on-a-chip
1 The term "functional BIST" describes a test method to control functional modules so that they generate a deterministic test set, which targets structural faults within ...
Silvia Chiusano, Paolo Prinetto, Hans-Joachim Wund...