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DATE
2000
IEEE
142views Hardware» more  DATE 2000»
15 years 11 months ago
Power and Delay Reduction via Simultaneous Logic and Placement Optimization in FPGAs
Traditional FPGA design flows have treated logic synthesis and physical design as separate steps. With the recent advances in technology, the lack of information on the physical ...
Balakrishna Kumthekar, Fabio Somenzi
LICS
1997
IEEE
15 years 11 months ago
The Complexity of Subtype Entailment for Simple Types
A subtyping 0 is entailed by a set of subtyping constraints C, written C j= 0, if every valuation (mapping of type variables to ground types) that satisfies C also satisfies 0. ...
Fritz Henglein, Jakob Rehof
HIS
2004
15 years 8 months ago
Adaptive Boosting with Leader based Learners for Classification of Large Handwritten Data
Boosting is a general method for improving the accuracy of a learning algorithm. AdaBoost, short form for Adaptive Boosting method, consists of repeated use of a weak or a base le...
T. Ravindra Babu, M. Narasimha Murty, Vijay K. Agr...
HPDC
2010
IEEE
15 years 7 months ago
Massive Semantic Web data compression with MapReduce
The Semantic Web consists of many billions of statements made of terms that are either URIs or literals. Since these terms usually consist of long sequences of characters, an effe...
Jacopo Urbani, Jason Maassen, Henri E. Bal
CVIU
2006
209views more  CVIU 2006»
15 years 6 months ago
Joint optical flow estimation, segmentation, and 3D interpretation with level sets
This paper describes a variational method with active curve evolution and level sets for the estimation, segmentation, and 3D interpretation of optical flow generated by independe...
Hicham Sekkati, Amar Mitiche