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IPPS
2006
IEEE
16 years 16 days ago
Fault injection in distributed Java applications
In a network consisting of several thousands computers, the occurrence of faults is unavoidable. Being able to test the behaviour of a distributed program in an environment where ...
William Hoarau, Sébastien Tixeuil, Fabien V...
DATE
1997
IEEE
92views Hardware» more  DATE 1997»
15 years 10 months ago
MOSAIC: a multiple-strategy oriented sequential ATPG for integrated circuits
The paper proposes a novel approach in an attempt to solve the test problem for sequential circuits. Up until now, most of the classical test pattern techniques use a number of al...
A. Dargelas, C. Gauthron, Yves Bertrand
VTS
1996
IEEE
111views Hardware» more  VTS 1996»
15 years 10 months ago
Synthesis-for-scan and scan chain ordering
Designing a testable circuit is often a two step process. First, the circuit is designed to conform to the functional specifications. Then, the testability aspects are added. By t...
Robert B. Norwood, Edward J. McCluskey
EURODAC
1994
IEEE
117views VHDL» more  EURODAC 1994»
15 years 10 months ago
A hardware environment for prototyping and partitioning based on multiple FPGAs
This paper presents a multiple-FPGA-based experimentation board. The problem to be solved is that of implementing a circuit into a set of FPGAs. This board provides a hardware env...
Marc Wendling, Wolfgang Rosenstiel
AUSAI
2008
Springer
15 years 8 months ago
Practical Bias Variance Decomposition
Abstract. Bias variance decomposition for classifiers is a useful tool in understanding classifier behavior. Unfortunately, the literature does not provide consistent guidelines on...
Remco R. Bouckaert