Sciweavers

154 search results - page 8 / 31
» Limiting the power consumption of main memory
Sort
View
ICFCA
2009
Springer
15 years 10 months ago
Handling Large Formal Context Using BDD - Perspectives and Limitations
This paper presents Binary Decision Diagrams (BDDs) applied to Formal Concept Analysis (FCA). The aim is to increase the FCA capability to handle large formal contexts. The main id...
Andrei Rimsa, Luis E. Zárate, Mark A. J. So...
ISQED
2008
IEEE
154views Hardware» more  ISQED 2008»
16 years 13 days ago
Error Protected Data Bus Inversion Using Standard DRAM Components
Off-chip communication consumes a significant part of main memory system power. Existing solutions imply the use of specialized memories or assume error free environments. This i...
Maurizio Skerlj, Paolo Ienne
ISSS
1999
IEEE
149views Hardware» more  ISSS 1999»
15 years 10 months ago
A Buffer Merging Technique for Reducing Memory Requirements of Synchronous Dataflow Specifications
Synchronous Dataflow, a subset of dataflow, has proven to be a good match for specifying DSP programs. Because of the limited amount of memory in embedded DSPs, a key problem duri...
Praveen K. Murthy, Shuvra S. Bhattacharyya
DAC
1998
ACM
16 years 7 months ago
Reducing Power in High-Performance Microprocessors
Power consumption has become one of the biggest challenges in high-performance microprocessor design. The rapid increase in the complexity and speed of each new CPU generation is ...
Vivek Tiwari, Deo Singh, Suresh Rajgopal, Gaurav M...
DATE
2004
IEEE
146views Hardware» more  DATE 2004»
15 years 9 months ago
Data Reuse Analysis Technique for Software-Controlled Memory Hierarchies
In multimedia and other streaming applications a significant portion of energy is spent on data transfers. Exploiting data reuse opportunities in the application, we can reduce th...
Ilya Issenin, Erik Brockmeyer, Miguel Miranda, Nik...