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» Limiting the power consumption of main memory
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TCAD
2008
127views more  TCAD 2008»
15 years 6 months ago
Speculative Loop-Pipelining in Binary Translation for Hardware Acceleration
Abstract--Multimedia and DSP applications have several computationally intensive kernels which are often offloaded and accelerated by application-specific hardware. This paper pres...
Sejong Oh, Tag Gon Kim, Jeonghun Cho, Elaheh Bozor...
ICC
2007
IEEE
114views Communications» more  ICC 2007»
16 years 11 days ago
Two-Factor Localized Authentication Scheme for WLAN Roaming
- In the paper, we propose an efficient two-factor localized authentication scheme suitable for WLAN roaming. The proposed authentication scheme can greatly improve the security co...
Xiaodong Lin, Haojin Zhu, Pin-Han Ho, Xuemin Shen
MICRO
2009
IEEE
178views Hardware» more  MICRO 2009»
16 years 21 days ago
Improving cache lifetime reliability at ultra-low voltages
Voltage scaling is one of the most effective mechanisms to reduce microprocessor power consumption. However, the increased severity of manufacturing-induced parameter variations a...
Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerso...
CODES
2009
IEEE
16 years 24 days ago
FRA: a flash-aware redundancy array of flash storage devices
Since flash memory has many attractive characteristics such as high performance, non-volatility, low power consumption and shock resistance, it has been widely used as storage med...
Yangsup Lee, Sanghyuk Jung, Yong Ho Song
DPD
2006
98views more  DPD 2006»
15 years 6 months ago
GRACE-based joins on active storage devices
Contemporary long-term storage devices feature powerful embedded processors and sizeable memory buffers. Active Storage Devices (ASD) is the hard disk technology that makes use of ...
Vassilis Stoumpos, Alex Delis