154 search results - page 10 / 31 » Limiting the power consumption of main memory |
174
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RTCSA
2005
IEEE
15 years 11 months ago
2005
IEEE
Most prior theoretical research on partitioning algorithms for real-time multiprocessor platforms has focused on ensuring that the cumulative computing requirements of the tasks a...
126
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ASPDAC
2004
ACM
15 years 11 months ago
2004
ACM
— In deep-submicron (DSM) technology, minimizing power consumption of a bus is one of the most important design objectives in embedded system-on-chip (SoC) design. In this paper,...
172
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HPCA
2005
IEEE
16 years 6 months ago
2005
IEEE
ZettaRAMTM is a new memory technology under development by ZettaCoreTM as a potential replacement for conventional DRAM. The key innovation is replacing the conventional capacitor...
162
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TVLSI
2010
15 years 22 days ago
2010
Mobile multimedia systems are growing in complexity, scalability and thus correspondingly in their implementation challenges. By design, these systems have built-in error resilienc...
153
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ICCAD
2003
IEEE
16 years 2 months ago
2003
IEEE
On-chip L1 and L2 caches represent a sizeable fraction of the total power consumption of microprocessors. In deep sub-micron technology, the subthreshold leakage power is becoming...