—A significant fraction of network events (such as topology or route changes) and the resulting performance degradation stem from premeditated network management and operational...
Industry has shifted towards multi-core designs as we have hit the memory and power walls. However, single thread performance remains of paramount importance since some applicatio...
The incidence of hard errors in CPUs is a challenge for future multicore designs due to increasing total core area. Even if the location and nature of hard errors are known a prio...
Michael D. Powell, Arijit Biswas, Shantanu Gupta, ...
—Computer science academics and professionals typically consider their contributions in terms of the algorithms, applications, and techniques that they develop. Yet equally impor...
Recent micro-architectural research has proposed various schemes to enhance processors with additional tags to track various properties of a program. Such a technique, which is us...
Haibo Chen, Liwei Yuan, Xi Wu, Binyu Zang, Bo Huan...