3018 search results - page 335 / 604 » Leveraging the |
133
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MICRO
1999
IEEE
15 years 11 months ago
1999
IEEE
Increasing levels of microprocessor power dissipation call for new approaches at the architectural level that save energy by better matching of on-chip resources to application re...
166
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MICRO
1999
IEEE
15 years 11 months ago
1999
IEEE
Branch mispredictions are a major obstacle to exploiting instruction-level parallelism, at least in part because all instructions after a mispredicted branch are squashed. However...
154
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ICCAD
1998
IEEE
15 years 11 months ago
1998
IEEE
Due to the exponential growth of both design complexity and the number of gates per pin, functional debugging has emerged as a critical step in the development of a system-on-chip...
156
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ICECCS
1998
IEEE
15 years 11 months ago
1998
IEEE
All systems, regardless of how carefully they have been constructed, suffer failures. This paper focuses on developing a formal understanding of failure with respect to system imp...
182
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IPPS
1998
IEEE
15 years 11 months ago
1998
IEEE
The RAIN (Reliable Array of Independent Nodes) project at Caltech is focusing on creating highly reliable distributed systems by leveraging commercially available personal compute...