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» Level Shifter Design for Low Power Applications
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ARVLSI
2001
IEEE
305views VLSI» more  ARVLSI 2001»
15 years 9 months ago
Logic Design Considerations for 0.5-Volt CMOS
As the operating supply voltage for commercial CMOS devices falls below 2 V, research activities are underway to develop CMOS integrated circuits that can operate at supply voltag...
K. Joseph Hass, Jack Venbrux, Prakash Bhatia
BMCBI
2006
148views more  BMCBI 2006»
15 years 6 months ago
Exploiting the full power of temporal gene expression profiling through a new statistical test: Application to the analysis of m
Background: The identification of biologically interesting genes in a temporal expression profiling dataset is challenging and complicated by high levels of experimental noise. Mo...
Veronica Vinciotti, Xiaohui Liu, Rolf Turk, Emile ...
EWSN
2009
Springer
16 years 6 months ago
A Better Choice for Sensor Sleeping
Sensor sleeping is a widely-used and cost-effective technique to save energy in wireless sensor networks. Protocols at different stack levels can, either individually or simultaneo...
Ou Yang, Wendi Rabiner Heinzelman
SIBGRAPI
2006
IEEE
16 years 4 days ago
Increasing statistical power in medical image analysis
In this paper, we present a novel method for estimating the effective number of independent variables in imaging applications that require multiple hypothesis testing. The method ...
Alexei Manso Correa Machado
DAC
2005
ACM
16 years 7 months ago
User-perceived latency driven voltage scaling for interactive applications
Power has become a critical concern for battery-driven computing systems, on which many applications that are run are interactive. System-level voltage scaling techniques, such as...
Le Yan, Lin Zhong, Niraj K. Jha