Sciweavers

4263 search results - page 324 / 853
» Learning without Coding
Sort
View
CF
2004
ACM
16 years 3 days ago
Integrated temporal and spatial scheduling for extended operand clustered VLIW processors
Centralized register file architectures scale poorly in terms of clock rate, chip area, and power consumption and are thus not suitable for consumer electronic devices. The conse...
Rahul Nagpal, Y. N. Srikant
DATE
2003
IEEE
137views Hardware» more  DATE 2003»
15 years 12 months ago
Dynamic Conditional Branch Balancing during the High-Level Synthesis of Control-Intensive Designs
We present two novel strategies to increase the scope for application of speculative code motions: (1) Adding scheduling steps dynamically during scheduling to conditional branche...
Sumit Gupta, Nikil D. Dutt, Rajesh K. Gupta, Alexa...
ISHPC
1999
Springer
15 years 11 months ago
Instruction-Level Microprocessor Modeling of Scientific Applications
Superscalar microprocessor efficiency is generally not as high as anticipated. In fact, sustained utilization below thirty percent of peak is not uncommon, even for fully optimized...
Kirk W. Cameron, Yong Luo, James Scharzmeier
COOPIS
2004
IEEE
15 years 10 months ago
TRAP/J: Transparent Generation of Adaptable Java Programs
This paper describes TRAP/J, a software tool that enables new adaptable behavior to be added to existing Java applications transparently (that is, without modifying the application...
Seyed Masoud Sadjadi, Philip K. McKinley, Betty H....
CP
2008
Springer
15 years 8 months ago
Perfect Derived Propagators
When implementing a propagator for a constraint, one must decide about variants: When implementing min, should one also implement max? Should one implement linear equations both wi...
Christian Schulte, Guido Tack