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ISLPED
2004
ACM
139views Hardware» more  ISLPED 2004»
16 years 4 days ago
Eliminating voltage emergencies via microarchitectural voltage control feedback and dynamic optimization
Microprocessor designers use techniques such as clock gating to reduce power dissipation. An unfortunate side-effect of these techniques is the processor current fluctuations th...
Kim M. Hazelwood, David Brooks
ISLPED
2004
ACM
137views Hardware» more  ISLPED 2004»
16 years 4 days ago
Location cache: a low-power L2 cache system
While set-associative caches incur fewer misses than directmapped caches, they typically have slower hit times and higher power consumption, when multiple tag and data banks are p...
Rui Min, Wen-Ben Jone, Yiming Hu
ISPD
2004
ACM
134views Hardware» more  ISPD 2004»
16 years 4 days ago
Performance-driven register insertion in placement
As the CMOS technology is scaled into the dimension of nanometer, the clock frequencies and die sizes of ICs are shown to be increasing steadily [5]. Today, global wires that requ...
Dennis K. Y. Tong, Evangeline F. Y. Young
IUI
2004
ACM
16 years 4 days ago
An intelligent 3D user interface adapting to user control behaviors
The WALK mode is one of the most common navigation interfaces for 3D virtual environments. However, due to the limited view angle and low frame rate, users are often blocked by ob...
Tsai-Yen Li, Shu-Wei Hsu
JCDL
2004
ACM
134views Education» more  JCDL 2004»
16 years 4 days ago
Exploring the relationship between personal and public annotations
Today people typically read and annotate printed documents even if they are obtained from electronic sources like digital libraries. If there is a reason for them to share these p...
Catherine C. Marshall, A. J. Bernheim Brush
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