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ASPDAC
2009
ACM
190views Hardware» more  ASPDAC 2009»
15 years 10 months ago
A reverse-encoding-based on-chip AHB bus tracer for efficient circular buffer utilization
The post-T/pre-T trace refers to the trace captured before/after a target point is reached, respectively. Real time compression of the post-T trace in a circular buffer is a challe...
Fu-Ching Yang, Cheng-Lung Chiang, Ing-Jer Huang
ATVA
2006
Springer
99views Hardware» more  ATVA 2006»
15 years 10 months ago
Whodunit? Causal Analysis for Counterexamples
Although the counterexample returned by a model checker can help in reproducing the symptom related to a defect, a significant amount of effort is often required for the programmer...
Chao Wang, Zijiang Yang, Franjo Ivancic, Aarti Gup...
AICCSA
2001
IEEE
103views Hardware» more  AICCSA 2001»
15 years 10 months ago
Seamless Integration of Control Flow and Data Flow in a Visual Language
In the visual programming domain, the stress of research is laid on the use of visual formalism, which is considered to be more intuitive than the textual formalism, in the progra...
Honitriniela Randriamparany, Bertrand Ibrahim
ISORC
2000
IEEE
15 years 10 months ago
Verification of UML-Based Real-Time System Designs by Means of cTLA
The Unified Modeling Language UML is well-suited for the design of real-time systems. In particular, the design of dynamic system behaviors is supported by interaction diagrams an...
Günter Graw, Peter Herrmann, Heiko Krumm
EURODAC
1995
IEEE
164views VHDL» more  EURODAC 1995»
15 years 10 months ago
Bottleneck removal algorithm for dynamic compaction and test cycles reduction
: We present a new, dynamic algorithm for test sequence compaction and test cycle reduction for combinationaland sequential circuits. Several dynamic algorithms for compaction in c...
Srimat T. Chakradhar, Anand Raghunathan