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184
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DAC
2008
ACM
16 years 8 months ago
2008
ACM
Extensive software-based simulation continues to be the mainstream methodology for functional verification of designs. To optimize the use of limited simulation resources, coverag...
189
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DAC
2003
ACM
16 years 8 months ago
2003
ACM
The use of Support Vector Machines (SVMs) to represent the performance space of analog circuits is explored. In abstract terms, an analog circuit maps a set of input design parame...
192
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DAC
2003
ACM
16 years 8 months ago
2003
ACM
Functional verification is widely acknowledged as the bottleneck in the hardware design cycle. This paper addresses one of the main challenges of simulation based verification (or...
181
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DAC
2005
ACM
16 years 8 months ago
2005
ACM
SAT (Boolean satisfiability) has become the primary Boolean reasoning engine for many EDA applications, so the efficiency of SAT solving is of great practical importance. Recently...
193
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SIGSOFT
2008
ACM
16 years 7 months ago
2008
ACM
In this paper, we explore the problems associated with exception handling from a new dimension: the human. We designed a study that evaluates (1) different perspectives of softwar...