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ISCA
2000
IEEE
103views Hardware» more  ISCA 2000»
15 years 11 months ago
Piranha: a scalable architecture based on single-chip multiprocessing
The microprocessor industry is currently struggling with higher development costs and longer design times that arise from exceedingly complex processors that are pushing the limit...
Luiz André Barroso, Kourosh Gharachorloo, R...
RTCSA
2000
IEEE
15 years 11 months ago
Frame packing in real-time communication
A common computational model in distributed embedded systems is that the nodes exchange signals via a network. Most often a signal represents the state of some physical device and...
Kristian Sandström, Christer Norström, M...
SIGMOD
1999
ACM
99views Database» more  SIGMOD 1999»
15 years 10 months ago
Belief Reasoning in MLS Deductive Databases
It is envisaged that the application of the multilevel security (MLS) scheme will enhance exibility and e ectiveness of authorization policies in shared enterprise databases and w...
Hasan M. Jamil
ICDCS
1999
IEEE
15 years 10 months ago
Search Space Reduction in QoS Routing
To provide real-time service or engineer constrained-based paths, networks require the underlying routing algorithm to be able to find low-cost paths that satisfy given Quality-of...
Liang Guo, Ibrahim Matta
FPGA
1999
ACM
174views FPGA» more  FPGA 1999»
15 years 10 months ago
Reduction of Latency and Resource Usage in Bit-Level Pipelined Data Paths for FPGAs
Pipelining of data path structures increases the throughput rate at the expense of enlarged resource usage and latency unless architectures optimized towards specific applications...
Peter Kollig, Bashir M. Al-Hashimi
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