3706 search results - page 139 / 742 » KtSeqC: System Description |
108
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DATE
2006
IEEE
16 years 17 days ago
2006
IEEE
In recent years, Assertion-Based Verification is being widely accepted as a key technology in the pre-silicon validation of system-on-chip(SOC) designs. The System Verilog langua...
196
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DATE
2003
IEEE
15 years 11 months ago
2003
IEEE
In this paper we present the results of a set of experiments we conducted in order to evaluate the viability of the behavioral synthesis, relying on the tools available at the mom...
200
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APN
1999
Springer
15 years 10 months ago
1999
Springer
Discrete event dynamic systems may have extremely large state spaces. For their analysis, it is usual to relax the description by removing the integrality constraints. Applying thi...
150
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SIGDIAL
2010
15 years 4 months ago
2010
In this paper we present experiments related to the validation of spoken language understanding capabilities in a language and culture training system. In this application, word-l...
187
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ICASSP
2011
IEEE
14 years 10 months ago
2011
IEEE
The SRI speaker recognition system for the 2010 NIST speaker recognition evaluation (SRE) incorporates multiple subsystems with a variety of features and modeling techniques. We d...