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FPL
2007
Springer
176views Hardware» more  FPL 2007»
16 years 14 days ago
ReconOS: An RTOS supporting Hard- and Software Threads
Modern platform FPGAs integrate fine-grained reconfigurable logic with processor cores and allow the creation of complete configurable systems-on-chip. However, design methodol...
Enno Lübbers, Marco Platzner
WSFM
2007
Springer
16 years 12 days ago
From BPEL to SRML: A Formal Transformational Approach
The SENSORIA Reference Modelling Language (SRML) provides primitives for modelling business processes in a technology agnostic way. At the core of SRML is the notion of module as a...
Laura Bocchi, Yi Hong, Antónia Lopes, Jos&e...
BROADNETS
2006
IEEE
16 years 11 days ago
A Secure Programming Paradigm for Network Virtualization
—The central paradigm of today’s successful Internet is to keep the network core simple and move complexity towards the network end points. Unfortunately, this very paradigm li...
Ana Milanova, Sonia Fahmy, David Musser, Büle...
SAC
2006
ACM
16 years 8 days ago
Simplifying transformation of software architecture constraints
The heterogeneity of architectural constraint languages makes difficult the transformation of architectural constraints throughout the development process. Indeed they have signi...
Chouki Tibermacine, Régis Fleurquin, Salah ...
DATE
2005
IEEE
110views Hardware» more  DATE 2005»
15 years 12 months ago
Test Time Reduction Reusing Multiple Processors in a Network-on-Chip Based Architecture
The increasing complexity and the short life cycles of embedded systems are pushing the current system-onchip designs towards a rapid increasing on the number of programmable proc...
Alexandre M. Amory, Marcelo Lubaszewski, Fernando ...