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ICCD
2004
IEEE
98views Hardware» more  ICCD 2004»
16 years 3 months ago
Thermal-Aware IP Virtualization and Placement for Networks-on-Chip Architecture
Networks-on-Chip (NoC), a new SoC paradigm, has been proposed as a solution to mitigate complex on-chip interconnect problems. NoC architecture consists of a collection of IP core...
Wei-Lun Hung, Charles Addo-Quaye, Theo Theocharide...
DATE
2009
IEEE
113views Hardware» more  DATE 2009»
16 years 28 days ago
Scalable compile-time scheduler for multi-core architectures
As the number of cores continues to grow in both digital signal and general purpose processors, tools which perform automatic scheduling from model-based designs are of increasing...
Maxime Pelcat, Pierrick Menuet, Slaheddine Aridhi,...
IISWC
2009
IEEE
16 years 25 days ago
A communication characterisation of Splash-2 and Parsec
Recent benchmark suite releases such as Parsec specifically utilise the tightly coupled cores available in chipmultiprocessors to allow the use of newer, high performance, models ...
Nick Barrow-Williams, Christian Fensch, Simon Moor...
SUTC
2008
IEEE
16 years 17 days ago
An Embedded Computing Platform for Robot
As the robotic industry is growing boomingly, the functionalities and system's architecture of robots are more and more complex. The development of robotic application system...
Ching-Han Chen, Sz-Ting Liou
INFOCOM
2006
IEEE
16 years 6 days ago
Packet Pacing in Short Buffer Optical Packet Switched Networks
— In the absence of a cost-effective technology for storing optical signals, emerging optical packet switched (OPS) networks are expected to have severely limited buffering capab...
Vijay Sivaraman, Hossam A. ElGindy, David Moreland...