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CODES
2005
IEEE
15 years 11 months ago
Retargetable generation of TLM bus interfaces for MP-SoC platforms
In order to meet flexibility, performance and energy efficiency constraints, future SoC (System-on-Chip) designs will contain an increasing number of heterogeneous processor cor...
Andreas Wieferink, Rainer Leupers, Gerd Ascheid, H...
MSE
2005
IEEE
153views Hardware» more  MSE 2005»
15 years 11 months ago
ipPROCESS: Using a Process to Teach IP-Core Development
The reusing of Intellectual Property cores has been an alternative to the increasing gap between design productivity and chip complexity of emerging System-on-chip (SoC) designs. ...
Marilia Lima, Andre Aziz, Diogo José Costa ...
ICCD
2008
IEEE
122views Hardware» more  ICCD 2008»
16 years 3 months ago
Acquiring an exhaustive, continuous and real-time trace from SoCs
— The amount of time and resources that have to be spent on debugging of embedded cores continuously increases. Approaches valid 10 years ago can no longer be used due to the var...
Christian Hochberger, Alexander Weiss
ICPPW
2009
IEEE
16 years 24 days ago
Towards a Component-Based Observation of MPSoC
Abstract——Motivated by the increasing heterogeneity and complexity of MPSoC systems, we propose a component-based generic approach for MPSoC observation. We show that components...
Carlos Prada-Rojas, Vania Marangozova-Martin, Kiri...
FMCAD
2007
Springer
16 years 10 days ago
Two-Dimensional Regular Expressions for Compositional Bus Protocols
—Bus and interconnect protocols contain a few core operations (such as read and write transfers) whose behaviors interleave to form complex executions. Specifications of the cor...
Kathi Fisler