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VLSID
2002
IEEE
98views VLSI» more  VLSID 2002»
16 years 7 months ago
On Test Scheduling for Core-Based SOCs
We present a mathematical model for the problem of scheduling tests for core-based system-on-chip (SOC) VLSI designs. Given a set of tests for each core in the SOC and a set of te...
Sandeep Koranne
176
Voted
ISORC
2006
IEEE
16 years 26 days ago
Automatic Memory Management in Utility Accrual Scheduling Environments
Convenience, reliability, and effectiveness of automatic memory management have long been established in modern systems and programming languages such as Java. The timeliness req...
Shahrooz Feizabadi, Godmar Back
DATE
2005
IEEE
110views Hardware» more  DATE 2005»
16 years 14 days ago
Rapid Generation of Thermal-Safe Test Schedules
Overheating has been acknowledged as a major issue in testing complex SOCs. Several power constrained system-level DFT solutions (power constrained test scheduling) have recently ...
Paul M. Rosinger, Bashir M. Al-Hashimi, Krishnendu...
HPDC
2005
IEEE
16 years 14 days ago
A new metric for robustness with application to job scheduling
Scheduling strategies for parallel and distributed computing have mostly been oriented toward performance, while striving to achieve some notion of fairness. With the increase in ...
Darin England, Jon B. Weissman, Jayashree Sadagopa...
INFOCOM
2005
IEEE
16 years 13 days ago
The impact of imperfect scheduling on cross-layer rate control in wireless networks
— In this paper, we study cross-layer design for rate control in multihop wireless networks. In our previous work, we have developed an optimal cross-layered rate control scheme ...
Xiaojun Lin, Ness B. Shroff