4854 search results - page 545 / 971 » It's the Programming, Stupid |
179
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HPCA
2009
IEEE
16 years 7 months ago
2009
IEEE
Heterogeneous multicores, such as Cell BE processors and GPGPUs, typically do not have caches for their accelerator cores because coherence traffic, cache misses, and latencies fr...
185
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HPCA
2008
IEEE
16 years 7 months ago
2008
IEEE
Estimating the maximum power and thermal characteristics of a processor is essential for designing its power delivery system, packaging, cooling, and power/thermal management sche...
189
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HPCA
2001
IEEE
16 years 7 months ago
2001
IEEE
Mispredicted branches and loads that miss in the cache cause the majority of retirement stalls experienced by sequential processors; we call these critical instructions. Despite t...
248
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MOBIHOC
2005
ACM
16 years 6 months ago
2005
ACM
We consider a wireless sensor network in which sensors are grouped into clusters, each with its own cluster head (CH). Each CH collects data from sensors in its cluster and relays...
182
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EUROSYS
2006
ACM
16 years 4 months ago
2006
ACM
Nearly ten years after its first presentation and five years after its first application to operating systems, the suitability of AspectOriented Programming (AOP) for the devel...